IDT SMBus Interfaces
PES24T3G2 User Manual
5 - 3
February 22, 2012
Notes
configuration spaces may be used to initialize the device. Any serial EEPROM compatible with those listed
in Table 5.2 may be used to store the PES24T3G2 initialization values. Some of these devices are larger
than the total size of all of the PCI configuration spaces in the PES24T3G2 that may be initialized and thus
may not be fully utilized.
During serial EEPROM initialization, the master SMBus interface begins reading bytes starting at serial
EEPROM address zero. These bytes are interpreted as configuration blocks and sequential reading of the
serial EEPROM continues until the end of a configuration done block is reached or the serial EEPROM
address rolls over from 0xFFFF to 0x0.
A blank serial EEPROM contains 0xFF in all data bytes. Therefore, when the PES24T3G2 is configured
to initialize from serial EEPROM and the second byte read from the EEPROM is0xFF, loading of the serial
EEPROM is aborted, the computed checksum is ignored, and normal device operation beings (i.e., the
device operates in the same manner as though i were not configured to initialize from the serial EEPROM).
–
This behavior allows a board manufacturing flow that utilizes uninitialized serial EEPROMs. See
section Programming the Serial EEPROM on page 5-6 for information on in-system initialization
of the serial EEPROM.
All register initialization performed by the serial EEPROM is performed in double word quantities.
There are three configuration block types that may be stored in the serial EEPROM. The first type is a
single double word initialization sequence. A double word initialization sequence occupies six bytes in the
serial EEPROM and is used to initialize a single double word quantity in the PES24T3G2. A single double
word initialization sequence consists of three fields and its format is shown in Figure 5.2. The
CSR_SYSADDR field contains the double word CSR system address of the double word to be initialized.
The actual CSR system address, which is a byte address, equals this value with two lower zero bits
appended. The next field is the TYPE field that indicates the type of the configuration block. For single
double word initialization sequence, this value is always 0x0. The final DATA field contains the double word
initialization value.
Figure 5.2 Single Double Word Initialization Sequence Format
Serial EEPROM
Size
24C32
4 KB
24C64
8 KB
24C128
16 KB
24C256
32 KB
24C512
64 KB
Table 5.2 PES24T3G2 Compatible Serial EEPROMs
Bit
0
Bit
1
Bit
2
Bit
3
Bit
4
Bit
5
Bit
6
Bit
7
Byte 0
CSR_SYSADDR[7:0]
CSR_SYSADDR[13:8]
TYPE
0x0
Byte 1
Byte 2
DATA[7:0]
Byte 3
DATA[15:8]
Byte 4
DATA[23:16]
Byte 5
DATA[31:24]
Summary of Contents for 89HPES24T3G2ZBAL
Page 8: ...IDT PES24T3G2 User Manual 6 February 22 2012 Notes...
Page 12: ...IDT Table of Contents PES24T3G2 User Manual iv February 22 2012 Notes...
Page 14: ...IDT List of Tables PES24T3G2 User Manual vi February 22 2012 Notes...
Page 16: ...IDT List of Figures PES24T3G2 User Manual viii February 22 2012 Notes...
Page 20: ...IDT Register List PES24T3G2 User Manual xii February 22 2012 Notes...
Page 32: ...IDT PES24T3G2 Device Overview PES24T3G2 User Manual 1 12 February 22 2012 Notes...
Page 72: ...IDT SMBus Interfaces PES24T3G2 User Manual 5 20 February 22 2012 Notes...
Page 76: ...IDT Power Management PES24T3G2 User Manual 6 4 February 22 2012 Notes...
Page 156: ...IDT Configuration Registers PES24T3G2 User Manual 8 74 February 22 2012 Notes...