Renesas 89HPES24T3G2ZBAL, User Manual

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Notes
PES24T3G2 User Manual 1 - 1 February 22, 2012
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Chapter 1
PES24T3G2 Device Overview
Introduction
The 89HPES24T3G2 is a member of IDT’s PRECISE™ family of PCI Express® switching solutions. The
PES24T3G2 is a 24-lane, 3-port Gen2 peripheral chip that performs PCI Express base switching with a
feature set optimized for high performance applications such as servers, storage, and communications
systems. It provides connectivity and switching functions between a PCI Express upstream port and two
downstream ports and supports switching between downstream ports.
Features

High Performance PCI Express Switch
–
Twenty-four 5 Gbps Gen2 PCI Express lanes supporting
5 Gbps and 2.5 Gbps operation
– Up to three switch ports
– Support for Max Payload Size up to 2048 bytes
– Supports one virtual channel and eight traffic classes
– Fully compliant with PCI Express base specification Revision 2.0

Flexible Architecture with Numerous Configuration Options
–
Automatic per port link width negotiation to x8, x4, x2, or x1
– Automatic lane reversal on all ports
– Automatic polarity inversion
– Supports in-band hot-plug presence detect capability
– Supports external signal for hot plug event notification allowing SCI/SMI generation for legacy
operating systems
– Dynamic link width reconfiguration for power/performance optimization
– Configurable downstream port PCI-to-PCI bridge device numbering
– Crosslink support
– Supports ARI forwarding defined in the Alternative Routing-ID Interpretation (ARI) ECN for virtu-
alized and non-virtualized environments
– Ability to load device configuration from serial EEPROM

Legacy Support
– PCI compatible INTx emulation
– Supports bus locked transactions, allowing use of PCI Express with legacy software

Highly Integrated Solution
– Requires no external components
– Incorporates on-chip internal memory for packet buffering and queueing
– Integrates twenty-four 5 Gbps / 2.5 Gbps embedded SerDes, 8B/10B encoder/decoder (no sepa-
rate transceivers needed)

Reliability, Availability, and Serviceability (RAS) Features
– Ability to disable peer-to-peer communications
– Supports ECRC and Advanced Error Reporting
– All internal data and control RAMs are SECDED ECC protected
– Supports PCI Express hot-plug on all downstream ports
– Supports upstream port hot-plug
– Hot-swap capable I/O
– External Serial EEPROM contents are checksum protected
– Supports PCI Express Device Serial Number Capability
– Capability to monitor link reliability and autonomously change link speed to prevent link instability