Renesas 89HPES24T3G2ZBAL, User Manual

Page: 139 / 165

IDT Configuration Registers
PES24T3G2 User Manual 8 - 57 February 22, 2012
Notes
SWCTL - Switch Control (0x404)
5 CCLKDS RO HWINIT Common Clock Downstream. This bit reflects the value of the
CCLKDS signal sampled during Fundamental Reset.
6 CCLKUS RO HWINIT Common Clock Upstream. This bit reflects the value of the
CCLKUS signal sampled during Fundamental Reset.
7 MSMB-
SMODE
RO HWINIT Master SMBus Slow Mode. This bit reflects the value of the
MSMBSMODE signal sampled during Fundamental Reset.
8 REFCLKM RO HWINIT PCI Express Reference Clock Mode Select. This bit reflects the
value of the REFCLKM signal sampled during Fundamental
Reset.
9 RSTHALT RO HWINIT Reset Halt. This bit reflects the value of the RSTHALT signal
sampled during Fundamental Reset.
19:10 Reserved RO 0x0 Reserved field.
22:20 LOCKMODE RO 0x0 Lock Mode. This field reflects the current locked status of the
switch.
0x0 - (unlocked) Upstream port is unlocked
0x1 - Reserved
0x2 - (port2locked) Upstream port is locked with port 2.
0x3 - (Reserved
0x4 - (port4locked) Upstream port is locked with port 4.
0x5 - Reserved
27:23 Reserved RO 0x0 Reserved field.
31:28 MARKER RW 0x0
Sticky
Marker. This field is preserved across a hot reset and is available
for general software use.
A hot reset does not result in modification of this field.
Bit
Field
Field
Name
Type
Default
Value
Description
0 FRST RW 0x0 Fundamental Reset. Writing a one to this bit initiates a Funda-
mental Reset. Writing a zero has no effect. This field always
returns a value of zero when read.
Writing of a one to this bit always results in the PES24T3G2
returning a completion to the requester before the action speci-
fied by this bit takes effect.
See section Fundamental Reset on page 2-2 for the behavior of
this bit.
1 HRST RW 0x0 Hot Reset. Writing a one to this bit initiates a hot reset. Addition-
ally, the upstream port’s PHY initiates a full link retrain.
Writing a zero has no effect. This field always returns a value of
zero when read.
Writing of a one to this bit always results in the PES24T3G2
returning a completion to the requester before the action speci-
fied by this bit takes effect.
See section Hot Reset on page 2-5 for the behavior of this bit.
Bit
Field
Field
Name
Type
Default
Value
Description