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CHAPTER 16 STANDBY FUNCTION
Preliminary User’s Manual U16035EJ1V0UM
16.2.2 STOP mode
(1) STOP mode setting and operating status
The STOP mode is set by executing the STOP instruction. It can be set only with the main system clock.
Cautions 1. When the STOP mode is set, the X2 pin is internally connected to V
DD1
via a pull-up resistor
to minimize the leakage current at the crystal oscillator. Thus, do not use the STOP mode
in a system where an external clock is used for the main system clock.
2. Because the interrupt request signal is used to clear the standby mode, if there is an
interrupt source with the interrupt request flag set and the interrupt mask flag reset, the
standby mode is immediately cleared if set. Thus, the STOP mode is reset to the HALT mode
immediately after execution of the STOP instruction. After the wait set using the oscillation
stabilization time select register (OSTS), the operating mode is set.
The operating status in the STOP mode is described below.
Table 16-3. STOP Mode Operating Status
STOP Mode Setting
With Subsystem Clock
Without Subsystem Clock
Item
Clock generator
Only main system clock oscillation is stopped.
CPU
Operation stops.
Port (output latch)
Status before STOP mode setting is held.
16-bit timer/event counter
Operation stops.
8-bit timer/event counter
Operable only when TI50, TI51 are selected as count clock.
Watch timer
Operable when f
XT
is selected as count
Operation stops.
clock.
Watchdog timer
Operation stops.
Clock output/buzzer output
PCL and BUZ at low level.
A/D converter
Operation stops.
Serial interface
Other than UART
Operable only when externally supplied input clock is specified as the serial clock.
UART
Operation stops (transmit shift register 0 (TXS0), receive shift register 0 (RX0),
and receive buffer register 0 (RXB0) hold the value just before the clock stop).
External interrupt
Operable
