114
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 0
Preliminary User’s Manual U16035EJ1V0UM
6.4 Operations of 16-Bit Timer/Event Counter 0
6.4.1 Interval timer operations
Setting the 16-bit timer mode control register 0 (TMC0) and capture/compare control register 0 (CRC0) as shown
in Figure 6-7 allows operation as an interval timer. Interrupt request is generated repeatedly using the count value
set in 16-bit timer capture/compare register 00 (CR00) beforehand as the interval.
When the count value of the 16-bit timer counter 0 (TM0) matches the value set to CR00, counting continues with
the TM0 value cleared to 0 and the interrupt request signal (INTTM00) is generated.
Count clock of the 16-bit timer/event counter can be selected with bits 0 and 1 (PRM00, PRM01) of the prescaler
mode register 0 (PRM0).
See
6.5 Cautions for 16-Bit Timer/Event Counter 0 (2)
about the operation when the compare register value
is changed during timer count operation.
Figure 6-7. Control Register Settings for Interval Timer Operation
(a) 16-bit timer mode control register 0 (TMC0)
(b) Capture/compare control register 0 (CRC0)
Remark
0/1: Setting 0 or 1 allows another function to be used simultaneously with the interval timer. See
Figures
6-2
and
6-3
.
0
0
0
0
0
CRC02
0/1
CRC01
0/1
CRC00
0
CRC0
CR00 as compare register
0
0
0
0
TMC03
1
TMC02
1
TMC01
0/1
OVF0
0
TMC0
Clears and starts on match between TM0 and CR00
