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CHAPTER 6 16-BIT TIMER/EVENT COUNTER 0
Preliminary User’s Manual U16035EJ1V0UM
(2) Capture/compare control register 0 (CRC0)
This register controls the operation of the 16-bit timer capture/compare registers (CR00, CR01).
CRC0 is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets CRC0 value to 00H.
Figure 6-3. Format of Capture/Compare Control Register 0 (CRC0)
Address: FF62H After reset: 00H R/W
Symbol
7
6
5
4
3
2
1
0
CRC0
0
0
0
0
0
CRC02
CRC01
CRC00
CRC02
CR01 operating mode selection
0
Operates as compare register
1
Operates as capture register
CRC01
CR00 capture trigger selection
0
Captures on valid edge of TI01
1
Captures on valid edge of TI00 by reverse phase
CRC00
CR00 operating mode selection
0
Operates as compare register
1
Operates as capture register
Cautions 1. Timer operation must be stopped before setting CRC0.
2. When clear & start mode on a match between TM0 and CR00 is selected with the 16-bit timer
mode control register 0 (TMC0), CR00 should not be specified as a capture register.
3. If both the rising and falling edges have been selected as the valid edges of TI00, capture
is not performed.
4. To ensure the reliability of the capture operation, the capture trigger requires a pulse two
times longer than the count clock selected by prescaler mode register 0 (PRM0).
