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CHAPTER 6 16-BIT TIMER/EVENT COUNTER 0
Preliminary User’s Manual U16035EJ1V0UM
(1) 16-bit timer counter 0 (TM0)
TM0 is a 16-bit read-only register that counts count pulses.
The counter is incremented in synchronization with the rising edge of an input clock. If the count value is read
during operation, input of the count clock is temporarily stopped, and the count value at that point is read. The
count value is reset to 0000H in the following cases:
<1> At RESET input
<2> If TMC03 and TMC02 are cleared
<3> If valid edge of TI00 is input in the clear & start mode by inputting valid edge of TI00
<4> If TM0 and CR00 match in the clear & start mode on match between TM0 and CR00
(2) 16-bit timer capture/compare register 00 (CR00)
CR00 is a 16-bit register which has the functions of both a capture register and a compare register. Whether
it is used as a capture register or as a compare register is set by bit 0 (CRC00) of capture/compare control register
0 (CRC0).
• When CR00 is used as a compare register
The value set in the CR00 is constantly compared with the 16-bit timer counter 0 (TM0) count value, and an
interrupt request (INTTM00) is generated if they match. It can also be used as the register which holds the
interval time when TM0 is set to interval timer operation.
• When CR00 is used as a capture register
It is possible to select the valid edge of the TI00/TO0/P70 pin or the TI01/P71 pin as the capture trigger. Setting
of the TI00 or TI01 valid edge is performed by means of prescaler mode register 0 (PRM0).
If CR00 is specified as a capture register and capture trigger is specified to be the valid edge of the TI00/TO0/
P70 pin, the situation is as shown in Table 6-2. On the other hand, when capture trigger is specified to be
the valid edge of the TI01/P71 pin, the situation is as shown in Table 6-3.
Table 6-2. TI00/TO0/P70 Pin Valid Edge and CR00, CR01 Capture Trigger
ES01
ES00
TI00/TO0/P70 Pin Valid Edge
CR00 Capture Trigger
CR01 Capture Trigger
0
0
Falling edge
Rising edge
Falling edge
0
1
Rising edge
Falling edge
Rising edge
1
0
Setting prohibited
Setting prohibited
Setting prohibited
1
1
Both rising and falling edges
No capture operation
Both rising and falling edges
Table 6-3. TI01/P71 Pin Valid Edge and CR00 Capture Trigger
ES11
ES10
TI01/P71 Pin Valid Edge
CR00 Capture Trigger
0
0
Falling edge
Falling edge
0
1
Rising edge
Rising edge
1
0
Setting prohibited
Setting prohibited
1
1
Both rising and falling edges
Both rising and falling edges