133
CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51
Preliminary User’s Manual U16035EJ1V0UM
Figure 7-1. Block Diagram of 8-Bit Timer/Event Counter 50
Figure 7-2. Block Diagram of 8-Bit Timer/Event Counter 51
Internal bus
8-bit timer compare
register 50 (CR50)
TI50/TO50/P72
f
X
/2
4
f
X
/2
6
f
X
/2
8
f
X
/2
10
f
X
f
X
/2
2
Match
Mask circuit
OVF
Clear
3
Selector
TCL502 TCL501 TCL500
Timer clock select
register 50 (TCL50)
Internal bus
TCE50 TMC506 TMC504 LVS50 LVR50 TMC501 TOE50
Invert
level
8-bit timer mode control
register 50 (TMC50)
S
R
S
Q
R
INV
Selector
INTTM50
TO50/TI50/P72
Selector
8-bit timer
counter 50 (TM50)
Selector
Internal bus
TI51/TO51/P73
f
X
/2
3
f
X
/2
5
f
X
/2
7
f
X
/2
9
f
X
/2
Match
Mask circuit
OVF
Clear
3
TCL512 TCL511 TCL510
Timer clock select
register 51 (TCL51)
Internal bus
TCE51 TMC516 TMC514 LVS51 LVR51 TMC511 TOE51
Invert
level
8-bit timer mode control
register 51 (TMC51)
S
R
Q
R
INV
Selector
INTTM51
TO51/TI51/P73
Selector
Selector
Selector
8-bit timer
compare register
51 (CR51)
8-bit timer
counter 51
(TM51)
S
f
X
/2
11
