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CHAPTER 17 RESET FUNCTION
Preliminary User’s Manual U16035EJ1V0UM
Table 17-1. Hardware Statuses After Reset (1/2)
Hardware
Status After Reset
Program counter (PC)
Note 1
Contents of reset vector table
(0000H, 0001H) are set.
Stack pointer (SP)
Undefined
Program status word (PSW)
02H
RAM
Data memory
Undefined
Note 2
General-purpose register
Undefined
Note 2
Port (output latch)
00H
Port mode registers (PM0, PM2 to PM5, PM7)
FFH
Pull-up resistor option registers (PU0, PU2 to PU5, PU7)
00H
Processor clock control register (PCC)
04H
Memory size switching register (IMS)
CFH
Note 3
Memory expansion mode register (MEM)
00H
Oscillation stabilization time select register (OSTS)
04H
16-bit timer/event counter
Timer counter (TM0)
0000H
Capture/compare registers (CR00, CR01)
Undefined
Prescaler mode register (PRM0)
00H
Mode control register (TMC0)
00H
Output control register (TOC0)
00H
8-bit timer/event counter
Timer counters (TM50, TM51)
00H
Compare registers (CR50, CR51)
Undefined
Clock select registers (TCL50, TCL51)
00H
Mode control registers (TMC50, TMC51)
00H
Watch timer
Operation mode register (WTM)
00H
Watchdog timer
Clock select register (WDCS)
00H
Mode register (WDTM)
00H
Notes 1.
During reset input or oscillation stabilization time wait, only the PC contents among the hardware
statuses become undefined. All other hardware statuses remain unchanged after reset.
2.
When a reset is executed in the standby mode, the pre-reset status is held even after reset.
3.
Although the initial value is CFH, use the following value to be set for each version.
µ
PD780021AS, 780031AS: 42H
µ
PD780022AS, 780032AS: 44H
µ
PD780023AS, 780033AS: C6H
µ
PD780024AS, 780034AS: C8H
µ
PD78F0034BS:
Value for mask ROM versions
