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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51
Preliminary User’s Manual U16035EJ1V0UM
7.4.4 8-bit PWM output operation
8-bit timer/event counter operates as PWM output when bit 6 (TMC5n6) of 8-bit timer mode control register 5n
(TMC5n) is set to 1.
The duty rate pulse determined by the value set to 8-bit timer compare register 5n (CR5n) is output from TO5n.
Set the active level width of PWM pulse to CR5n, and the active level can be selected with bit 1 of TMC5n (TMC5n1).
Count clock can be selected with bits 0 to 2 (TCL5n0 to TCL5n2) of timer clock select register 5n (TCL5n).
Enable/disable for PWM output can be selected with bit 0 of TMC5n (TOE5n).
Caution
Rewrite of CR5n in PWM mode is allowed only once in a cycle.
Remark
n = 0, 1
(1) PWM output basic operation
[Setting]
<1>
Set port latch (P72, P73) and port mode register 7 (PM72, PM73) to 0.
<2>
Set active level width with 8-bit timer compare register (CR5n).
<3>
Select count clock with timer clock select register 5n (TCL5n).
<4>
Set active level with bit 1 of TMC5n (TMC5n1).
<5>
Count operation starts when bit 7 of TMC5n (TCE5n) is set to 1.
Set TCE5n to 0 to stop count operation.
[PWM output operation]
<1>
PWM output (output from TO5n) outputs inactive level after count operation starts until overflow is
generated.
<2>
When overflow is generated, the active level set in <1> of setting is output.
The active level is output until CR5n matches the count value of 8-bit timer counter 5n (TM5n).
<3>
After the CR5n matches the count value, PWM output outputs the inactive level again until overflow is
generated.
<4>
Operations <2> and <3> are repeated until the count operation stops.
<5>
When the count operation is stopped with TCE5n = 0, PWM output comes to inactive level.
Remark
n = 0, 1
