ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 6 Clock Generation Circuit
6-6
6.3.1.2 Operation of Low-Speed Clock Generation Circuit
The low-speed clock generation circuit is activated by the occurrence of power ON reset.
After the power-on, it waits for the low-speed oscillation start time (T
XTL
) and the low-speed clock (LSCLK) oscillation
stabilization time (8192 counts). Then, the mode moves to the program run mode, the CPU starts operation, and at the
same time the low-speed clock (LSCLK) is supplied to the peripheral circuits.
The low-speed clock generation circuit stops oscillation when it shifts to the STOP mode by software. When oscillation is
resumed by releasing of the STOP mode by external interrupt, LSCLK is supplied to the peripheral circuits after the
elapse of the low-speed oscillation start period (T
XTL
) and low-speed clock (LSCLK) oscillation stabilization time (8192
counts). For STOP mode, see Chapter 4, “MCU Control Function”.
Figure 6-3 shows the waveforms of the low-speed clock generation circuit. For the low-speed oscillation start time (T
XTL
),
see Appendix C, “Electrical Characteristics”.
Figure 6-3 Operation of Low-Speed Clock Generation Circuit
Note:
After the power supply is turned on, CPU starts operation with the low-speed clock. After the STOP mode is released,
the CPU starts operation with the low-speed clock (SYSCLK bit = "0") or high-speed clock (SYSCLK bit = "1")
depending on the FCON1's SYSCLK bit.
LSCLK waveform
SYSCLK waveform
STOP
mode
LSCLK supply started
and CPU started
T
XTL
: Oscillation start time
T
XTL
: Oscillation start time
Power
supply V
DD
RESET
LSCLK supply started
and CPU started
External interrupt
occurred
Low-speed oscillation
8192 counts
Low-Speed Clock
LSCLK
Low-speed
oscillation
4096 counts
Low-speed
oscillation
4096 counts
Low-speed oscillation
8192 counts
LSCLK waveform
Low-speed clock oscillation waveform
Low-speed clock oscillation waveform
System clock
SYSCLK
SYSCLK waveform
Low-Speed Clock
oscillation waveform
Low-speed oscillator
circuit start signal
RESET_VRX
Summary of Contents for ML610472
Page 12: ...Chapter 1 Overview...
Page 38: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 48: ...Chapter 4 MCU Control Function...
Page 62: ...Chapter 5 Interrupts...
Page 82: ...Chapter 6 Clock Generation Circuit...
Page 94: ...Chapter 7 Time Base Counter...
Page 105: ...Chapter 8 Capture...
Page 114: ...Chapter 9 Timer...
Page 133: ...Chapter 10 Watchdog Timer...
Page 141: ...Chapter 11 UART...
Page 164: ...Chapter 12 Port 0...
Page 173: ...Chapter 13 Port 2...
Page 180: ...Chapter 14 Port 3...
Page 188: ...Chapter 15 Port 4...
Page 199: ...Chapter 16 Port 6...
Page 205: ...Chapter 17 RC Oscillation Type A D Converter...
Page 225: ...Chapter 18 LCD Drivers...
Page 243: ...Chapter 19 Power Supply Circuit...
Page 245: ...Chapter 20 uEASE Flash Writer System...
Page 249: ...Chapter 21 Software Development...
Page 258: ...Appendixes...
Page 280: ...Revision History...