LAPIS Semiconductor ML610472, User Manual

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ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 13 Port 2
13-3
13.2.2 Port 2 Data Register (P2D)
Address: 0F210H
Access: R/W
Access size: 8-bit
Initial value: 00H
7 6 5 4 3 2 1 0
P2D
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
P21D P20D
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
P2D is a special function register (SFR) to set the output value of the Port 2. The value of this register is output to Port 2.
The value written to P2D is readable.
[Description of Bits]
•
P20D, P21D (bits 0, 1)
The P20D bits are used to set the output value of the Port 2 pin.
P21D Description
0 Output level of the P21 pin: ”L”
1 Output level of the P21 pin: ”H”
P20D Description
0 Output level of the P20 pin: ”L”
1 Output level of the P20 pin: ”H”
Note:
In 48-pin plastic TQFP, P21 pin is not available.