LAPIS Semiconductor ML610472, User Manual

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ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 5 Interrupt
5-6
5.2.5 Interrupt Enable Register 6 (IE6)
Address: 0F016H
Access: R/W
Access size: 8-bit
Initial value: 00H
7 6 5 4 3 2 1 0
IE6 E32H — E128H — — — — —
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
IE6 is a special function register (SFR) to control enable/disable for each interrupt request.
When an interrupt is accepted, the master interrupt enable flag (MIE) is set to “0”, but the corresponding flag of IE6 is
not reset.
[Description of Bits]
•
E128H (bit 5)
E128H is the enable flag for the time base counter 128 Hz interrupt (T128HINT).
E128H Description
0 Disabled (initial value)
1 Enabled
•
E32H (bit 7)
E32H is the enable flag for the time base counter 32 Hz interrupt (T32HINT).
E32H Description
0 Disabled (initial value)
1 Enabled