LAPIS Semiconductor ML610472, User Manual

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ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 5 Interrupt
5-4
5.2.3 Interrupt Enable Register 4 (IE4)
Address: 0F014H
Access: R/W
Access size: 8-bit
Initial value: 00H
7 6 5 4 3 2 1 0
IE4 — — ERAD — — — — EUA0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
IE4 is a special function register (SFR) to control enable/disable for each interrupt request.
When an interrupt is accepted, the master interrupt enable flag (MIE) is set to “0”, but the corresponding flag of IE4 is
not reset.
[Description of Bits]
•
EUA0 (bit 0)
EUA0 is the enable flag for the UART0 interrupt (UA0INT).
EUA0 Description
0 Disabled (initial value)
1 Enabled
•
ERAD (bit 5)
ERAD is the enable flag for the RC oscillation type A/D converter interrupt (RADINT).
ERA0 Description
0 Disabled (initial value)
1 Enabled