LAPIS Semiconductor ML610472, User Manual

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ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 14 Port 3
14-3
14.2.2 Port 3 Data Register (P3D)
Address: 0F218H
Access: R/W
Access size: 8-bit
Initial value: 00H
7 6 5 4 3 2 1 0
P3D
⎯ ⎯
P35D
⎯ ⎯ ⎯ ⎯ ⎯
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
P3D is a special function register (SFR) to set the value to be output to the Port 3 pin or to read the input level of the Port
3. In output mode, the value of this register is output to the Port 3 pin. The value written to P3D is readable.
In input mode, the input level of the Port 3 pin is read when P3D is read. Output mode or input mode is selected by using
the port direction register (P3DIR) described later.
[Description of Bits]
•
P35D (bit 5)
The P35D bit is used to set the output value of the Port 3 pin in output mode and to read the pin level of the Port
3 pin in input mode.
P35D Description
0 Output or input level of the P35 pin: ”L”
1 Output or input level of the P35 pin: ”H”