ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 11 UART
11-20
11.4 Specifying Port Registers
To enable the UART function, the applicable bit of each related port register needs to be set. See Chapter 15, “Port 4”
and Chapter 12, “Port 0” for detail about the port registers.
11.4.1 Functioning P43(TXD0) and P42(RXD0) as the UART
Set P43MD1-P42MD1 bits(bit3-bit2 of P4MOD1 register) to “0” and set P43MD0-P42MD0(bit3-bit2 of P4MOD0
register) to “1”, for specifying the UART as the secondary function of P43 and P42.
Register name
P4MOD1 register (Address: 0F225H)
Bit 7
6
5
4
3 2
1 0
Bit name
P47MD1 P46MD1 P45MD1
P44MD1
P43MD1
P42MD1
– –
Setting
value
* * * *
0 0
– –
Register name
P4MOD0 register (Address: 0F224H)
Bit 7
6
5
4
3 2
1 0
Bit name
P47MD0 P46MD0 P45MD0
P44MD0
P43MD0
P42MD0
– –
Setting
value
* * * *
1 1
– –
Set the P43C1 bit (P4CON1 register's bit 3) to "1", the P43C0 bit (P4CON0 register's bit 3) to "1", and the P43DIR bit
(P4DIR register's bit 3) to "0" for specifying the state mode of the P43 pin to CMOS output.
Set P42DIR bit (bit2 of P4DIR register) to “1” for specifying the P42 as an input pin.
The set value ($) is arbitrary for the P42C1 and P42C0 bits. Select an arbitrary input mode depending on the state of the
external circuit to which the P42 pin is connected.
Register name
P4CON1 register (Address: 0F223H)
Bit 7
6
5
4
3 2
1 0
Bit name
P47C1 P46C1 P45C1 P44C1
P43C1 P42C1
– –
Setting
value
* * * *
1 $
– –
Register name
P4CON0 register (Address: 0F222H)
Bit 7
6
5
4
3 2
1 0
Bit name
P47C0 P46C0 P45C0 P44C0
P43C0 P42C0
– –
Setting
value
* * * *
1 $
– –
Register name
P4DIR register (Address: 0F221H)
Bit 7
6
5
4
3 2
1 0
Bit name
P47DIR P46DIR P45DIR
P44DIR
P43DIR
P42DIR
– –
Setting
value
* * * *
0 1
– –
The P43D to D42D bits (P4D register bits 3 to 2) data can either be "0" or "1" (not need to be set).
Register name
P4D register (Address: 0F220H)
Bit 7
6
5
4
3 2
1 0
Bit name
P47D P46D P45D P44D
P43D P42D
– –
Setting
value
* * * *
** **
– –
* : Bit not related to the UART function
** : Don’t care $: Optional
Note:
The receive pin (RXD) is selected by U0RSEL bit (bit4 of UA0MOD0 register). The initial value "0" selects the P02 and
the value "1" selects the P42
In 48-pin plastic TQFP, P42 pin is not available. Please set the U0RSEL bit to “0”.
Summary of Contents for ML610472
Page 12: ...Chapter 1 Overview...
Page 38: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 48: ...Chapter 4 MCU Control Function...
Page 62: ...Chapter 5 Interrupts...
Page 82: ...Chapter 6 Clock Generation Circuit...
Page 94: ...Chapter 7 Time Base Counter...
Page 105: ...Chapter 8 Capture...
Page 114: ...Chapter 9 Timer...
Page 133: ...Chapter 10 Watchdog Timer...
Page 141: ...Chapter 11 UART...
Page 164: ...Chapter 12 Port 0...
Page 173: ...Chapter 13 Port 2...
Page 180: ...Chapter 14 Port 3...
Page 188: ...Chapter 15 Port 4...
Page 199: ...Chapter 16 Port 6...
Page 205: ...Chapter 17 RC Oscillation Type A D Converter...
Page 225: ...Chapter 18 LCD Drivers...
Page 243: ...Chapter 19 Power Supply Circuit...
Page 245: ...Chapter 20 uEASE Flash Writer System...
Page 249: ...Chapter 21 Software Development...
Page 258: ...Appendixes...
Page 280: ...Revision History...