LAPIS Semiconductor ML610472, User Manual

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ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 11 UART
11-21
11.4.2 Functioning P43(TXD0) and P02(RXD0) as the UART
Set P43MD1 bit (bit3 of P4MOD1 register) to “0” and set P43MD0(bit3 of P4MOD0 register) to “1”, for specifying the
UART as the secondary function of P43.
Register name P4MOD1 register (Address: 0F225H)
Bit 7 6 5 4 3 2 1 0
Bit name
P47MD1 P46MD1 P45MD1 P44MD1 P43MD1 P42MD1 – –
Setting value * * * * 0 $ – –
Register name P4MOD0 register (Address: 0F224H)
Bit 7 6 5 4 3 2 1 0
Bit name
P47MD0 P46MD0 P45MD0 P44MD0 P43MD0 P42MD0 – –
Setting value * * * * 1 $ – –
Set the P43C1 bit (P4CON1 register's bit 3) to "1", the P43C0 bit (P4CON0 register's bit 3) to "1", and the P43DIR bit
(P4DIR register's bit 3) to "0" for specifying the state mode of the P43 pin to CMOS output.
Register name P4CON1 register (Address: 0F223H)
Bit 7 6 5 4 3 2 1 0
Bit name
P47C1 P46C1 P45C1 P44C1 P43C1 P42C1 – –
Setting value * * * * 1 * – –
Register name P4CON0 register (Address: 0F222H)
Bit 7 6 5 4 3 2 1 0
Bit name
P47C0 P46C0 P45C0 P44C0 P43C0 P42C0 – –
Setting value * * * * 1 * – –
Register name P4DIR register (Address: 0F221H)
Bit 7 6 5 4 3 2 1 0
Bit name
P47DIR P46DIR P45DIR P44DIR P43DIR P42DIR – –
Setting value * * * * 0 * – –
The P43D bit (P4D register bit 3) data can either be "0" or "1" (not need to be set).
Register name P4D register (Address: 0F220H)
Bit 7 6 5 4 3 2 1 0
Bit name
P47D P46D P45D P44D P43D P42D – –
Setting value * * * * ** * – –