XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
TwinCAN Module
User’s Manual
21-71
V2.2, 2004-01
TwinCAN_X1, V2.1
The control and status element of the message control registers is implemented with two
complementary bits (except the frame counter value). This special mechanism allows
the selective setting or resetting of a specific element (leaving others unchanged) without
requiring read-modify-write cycles.
illustrates how to use these 2-bitfields.
Register MSGCFGn defines the configuration of message object n and the associated
interrupt node pointers. Changes of bits XTD, NODE or DIR by software are only taken
into account after setting bitfield MSGVAL to ‘10’. This avoids unintentional modification
while the message object is still active by explicitly defining a timing instant for the
update. Bits XTD, NODE or DIR can be written while MSGVAL is ‘01’ or ‘10’, the update
always takes place by setting MSGVAL to ‘10’.
Table 21-8
Setting/Resetting the Control and Status Element of the Message
Control Registers
Value of
the 2-bitfield
Function on Write
Meaning on Read
00
B
reserved
reserved
01
B
Reset element
Element is reset
10
B
Set element
Element is set
11
B
Leave element unchanged
reserved
MSGCFGHn (n = 31-0)
Message Object n Message Configuration Register High
Reset Value: 0000
H
MSGCFGLn (n = 31-0)
Message Object n Message Configuration Register Low
Reset Value: 0000
H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
TXINP
0
RXINP
r
rw
r
rw
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
DLC
DIR XTD
NO
DE
RMM
r
rwh
rwh
rw
rwh
rw
