
XC161 Derivatives
Peripheral Units (Vol. 2 of 2)
Capture/Compare Units
User’s Manual
17-36
V2.2, 2004-01
CC12_X1, V2.1
17.10
External Input Signal Requirements
The external input signals of a CAPCOM unit are sampled by the CAPCOM logic based
on the module clock and the basic operation mode (staggered or non-staggered mode).
To assure that a signal level is recognized correctly, its high or low level must be held
active for at least one complete sampling period.
The duration of a sampling period is one module clock cycle in non-staggered mode, and
8 module clock cycles in staggered mode. To recognize a signal transition, the signal
needs to be sampled twice. If the level of the first sampling is different to the level
detected during the second sampling, a transition is recognized. Therefore, a minimum
of two sampling periods are required for the sampling of an external input signal. Thus,
the maximum frequency of an input signal must not be higher than half the module clock
frequency in non-staggered mode, and a 1/16
th
of the module clock frequency in
staggered mode.
summarizes the requirements and limits for external input signals.
In order to use an external signal as a count or capture input, the port pin to which it is
connected must be configured as input.
Note: For example for test purposes a pin used as a count or capture input may be
configured as output. Software or an other peripheral may control the respective
signal and thus trigger count or capture events.
In order to cause a compare output signal to be seen by the external world, the
associated port pin must be configured as output. Compare output signals can either
directly switch the port latch, or the output of the CCx_OUT latch is used as an alternate
output function of a port.
Table 17-5
CAPCOM External Input Signal Limits
Non-Staggered Mode
Staggered Mode
Maximum Input Frequency
f
CC
/2
f
CC
/16
Minimum Input Signal Level
Duration
1/
f
CC
8/
f
CC