ICPDAS
I-8092F Software User Manual
108
Fig. A-27 Bit pattern data stack
The limitation for the speed of bit pattern interpolation driving
The maximum pulse output speed is 4MHz in bit pattern interpolation mode. However, the
maximum speed will depend on the data update rate of host CPU if the bit pattern data are more
than 48bits. For example of the X and Y axes bit pattern interpolation, if the host CPU needs
100µsec to update new 16-bit data for X and Y axes. The maximum speed is
16/100µSEC=160KPPS.
The ending of bit pattern interpolation
There are 2 ways can terminate the bit pattern interpolation.
(1) Write an ending code into buffer register of ax1. The bit pattern interpolation mode will be
finished, and stopped if the host CPU write “1” into both + and - directions buffer registers. When
the ending code is executed, the SC will become 0 automatically.
(2)The host CPU stops writing any command into I-8092F.
When SC=0, and when no other data is updated, I-8092F will stop outputting pulse. Then, the bit
pattern interpolation is finished.
Utilizing the stop command to pause the interpolation
The interpolation driving will be paused if a sudden stop or decelerating stop command is written
into the master axis (ax1) which is executing the bit pattern interpolation. I-8092F will continue the
bit pattern interpolation if the host CPU enables the bit pattern interpolation again. If the host CPU
wants to finish the interpolation after writing stop command, all of the interpolation bit data in the
buffer must be cleared in using BP register