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93
CHAPTER 5 CLOCKS
Table 5.3-1 Clock Selection Register (CKSCR) (1/2)
Bit name
Function
bit15
Reserved
Note:
Always write "1" to this bit.
bit14
MCM:
Machine clock
indication bit
•
This bit indicates whether the main clock or a PLL clock has been selected as the
machine clock.
•
When this bit is "0", a PLL clock has been selected. When it is 1, the main clock has
been selected.
•
If MCS = 0 and MCM = 1, the PLL clock oscillation stabilization wait time is in effect.
•
Writing this bit has no effect on operation.
bit13
bit12
WS1 and WS0:
Oscillation
stabilization wait time
selection bits
•
These bits select an oscillation stabilization wait time of the oscillation clock when stop
mode was released, sub-clock mode changes to main clock mode, or PLL clock mode.
•
These bits are initialized to "11
B
" by all reset causes.
Notes:
The oscillation stabilization wait time must be set to a value appropriate for the
oscillator used. See Section "7.2 Reset Cause and Oscillation Stabilization Wait
Times". These bits can be set to "00
B
" and "01
B
"only for main clock mode.
When PLL stop mode is returned to PLL clock mode, the oscillation stabilization wait
time requires 2
14
/HCLK or more. When changing to PLL clock mode, these bits must
be set to "10
B
" or "11
B
".
bit11
Reserved
Note:
Always write "1" to this bit.
WS1
WS0
wait time at 4 MHz
source oscillation
wait time at 5 MHz
source oscillation
0
0
approx. 256 s (2
10
counts of
source oscillation)
approx. 205 s (2
10
counts of
source oscillation)
0
1
approx. 2.05 ms (2
13
counts of
source oscillation)
approx. 1.64 ms (2
13
counts of
source oscillation)
1
0
approx. 8.19 ms (2
15
counts of
source oscillation)
approx. 6.56 ms (2
15
counts of
source oscillation)
1
1
approx. 33.77 ms (2
17
counts
of source oscillation)
approx. 26.21 ms (2
17
counts
of source oscillation)
Summary of Contents for MB90390 Series
Page 2: ......
Page 4: ......
Page 17: ...xiii APPENDIX D List of Interrupt Vectors 690 INDEX 695 ...
Page 18: ...xiv ...
Page 132: ...104 CHAPTER 5 CLOCKS ...
Page 152: ...124 CHAPTER 6 CLOCK MODULATOR ...
Page 210: ...182 CHAPTER 11 TIME BASE TIMER ...
Page 218: ...190 CHAPTER 12 WATCHDOG TIMER ...
Page 264: ...236 CHAPTER 14 16 BIT RELOAD TIMER WITH EVENT COUNT FUNCTION ...
Page 274: ...246 CHAPTER 15 WATCH TIMER ...
Page 306: ...278 CHAPTER 17 DTP EXTERNAL INTERRUPTS ...
Page 338: ...310 CHAPTER 18 8 10 BIT A D CONVERTER ...
Page 364: ...336 CHAPTER 19 UART0 UART1 ...
Page 398: ...370 CHAPTER 20 UART2 UART3 Figure 20 5 2 ORE Set Timing Receive data RDRF ORE ...
Page 432: ...404 CHAPTER 20 UART2 UART3 ...
Page 482: ...454 CHAPTER 22 SERIAL I O ...
Page 560: ...532 CHAPTER 24 STEPPING MOTOR CONTROLLER ...
Page 582: ...554 CHAPTER 27 ROM MIRRORING MODULE ...
Page 632: ...604 CHAPTER 29 EXAMPLES OF SERIAL PROGRAMMING CONNECTION ...
Page 722: ...694 APPENDIX ...
Page 723: ...695 INDEX The index follows on the next page This is listed in alphabetic order ...
Page 740: ......