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CHAPTER 23 CAN CONTROLLER
23.12
Procedure for Reception by Message Buffer (x)
After setting the bit timing, frame format, ID, and acceptance filter, make the settings
described below.
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Procedure for Reception by Message Buffer (x)
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Setting reception interrupt
To enable reception interrupt, set RIEx of the reception interrupt enable register (RIER) to "1".
To disable reception interrupt, set RIEx to "0".
●
Starting reception
When starting reception after setting, set BVALx of the message buffer valid register (BVALR) to "1" to
make the message buffer (x) valid.
●
Processing for reception completion
If reception is successful after passing to the acceptance filter, the received message is stored in the
message buffer (x) and RCx of the reception complete register (RCR) becomes "1". For data frame
reception, RRTRx of the remote request receiving register (RRTRR) becomes "0". For remote frame
reception, RRTRx becomes "1".
If a reception interrupt is enabled (RIEx of the reception interrupt enable register (RIER) is "1"), an
interrupt occurs.
After checking the reception completion (RCx = 1), process the received message.
After completion of processing the received message, check ROVRx of the reception overrun register
(ROVRR).
If ROVRx = 0, the processed received message is valid. Write "0" to RCRx to set it to "0" (the reception
complete interrupt is also canceled) to terminate reception.
If ROVRx = 1, a reception overrun occurred and the next message may have overwritten the processed
message. In this case, received messages should be processed again after setting the ROVRx bit to "0" by
writing "0" to it.
Figure 23.12-1 shows an example of receive interrupt handling.
Summary of Contents for MB90390 Series
Page 2: ......
Page 4: ......
Page 17: ...xiii APPENDIX D List of Interrupt Vectors 690 INDEX 695 ...
Page 18: ...xiv ...
Page 132: ...104 CHAPTER 5 CLOCKS ...
Page 152: ...124 CHAPTER 6 CLOCK MODULATOR ...
Page 210: ...182 CHAPTER 11 TIME BASE TIMER ...
Page 218: ...190 CHAPTER 12 WATCHDOG TIMER ...
Page 264: ...236 CHAPTER 14 16 BIT RELOAD TIMER WITH EVENT COUNT FUNCTION ...
Page 274: ...246 CHAPTER 15 WATCH TIMER ...
Page 306: ...278 CHAPTER 17 DTP EXTERNAL INTERRUPTS ...
Page 338: ...310 CHAPTER 18 8 10 BIT A D CONVERTER ...
Page 364: ...336 CHAPTER 19 UART0 UART1 ...
Page 398: ...370 CHAPTER 20 UART2 UART3 Figure 20 5 2 ORE Set Timing Receive data RDRF ORE ...
Page 432: ...404 CHAPTER 20 UART2 UART3 ...
Page 482: ...454 CHAPTER 22 SERIAL I O ...
Page 560: ...532 CHAPTER 24 STEPPING MOTOR CONTROLLER ...
Page 582: ...554 CHAPTER 27 ROM MIRRORING MODULE ...
Page 632: ...604 CHAPTER 29 EXAMPLES OF SERIAL PROGRAMMING CONNECTION ...
Page 722: ...694 APPENDIX ...
Page 723: ...695 INDEX The index follows on the next page This is listed in alphabetic order ...
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