204
CHAPTER 13 16-BIT I/O TIMER
13.4.1
Output Compare Register
These 16-bit compare registers are compared with the 16-bit free-run timer. Since the
initial register values are undefined, set appropriate value before enabling the
operation. These registers must be accessed by the word access instructions. When
the value of the register matches that of the 16-bit free-run timer, a compare signal is
generated and the output compare interrupt flag is set. If output is enabled, the output
level corresponding to the compare register is reversed.
To rewriting the compare register, within the compare interrupt routine or compare
operation is disabled. Be sure not to occur simultaneously a compare match and
writing the compare register.
■
Output Compare Register
Figure 13.4-2 Output Compare Register (OCCP)
7
6
5
4
3
2
1
0
Initial value
X X X X X X X X X X X X X X X X
B
R/W R/W R/W R/W R/W
R/W R/W
OCCPn
lo
w
er bits
C00
Compare Data Reg. 0
C01
Compare Data Reg. 1
C02
Compare Data Reg. 2
C03
Compare Data Reg. 3
C04
Compare Data Reg. 4
C05
Compare Data Reg. 5
C06
Compare Data Reg. 6
C07
Compare Data Reg. 7
n = 0, 1, 2, 3, 4, 5, 6, 7
OCCPn
upper bits
C08
Compare Data Reg. 8
C09
Compare Data Reg. 9
C10
Compare Data Reg. 10
C11
Compare Data Reg. 11
C12
Compare Data Reg. 12
C13
Compare Data Reg. 13
C14
Compare Data Reg. 14
C15
Compare Data Reg. 15
n = 0, 1, 2, 3, 4, 5, 6, 7
R/W
:
Readable and
w
ritable
15
bit
14
13
12
11
10
9
8
R/W R/W R/W R/W R/W
R/W R/W
R/W
R/W
Address:
003530
H
OCCP0
OCCP1
:
OCCP7
003531
H
003532
H
003533
H
003534
H
003535
H
003536
H
003537
H
003538
H
003539
H
00353A
H
00353B
H
00356A
H
00356B
H
00356C
H
00356E
H
bit0 to bit7
bit8 to bit15
C00
C01
C02
C03
C04
C05
C06
C07
C08
C09
C10
C11
C12
C13
C14
C15
Summary of Contents for MB90390 Series
Page 2: ......
Page 4: ......
Page 17: ...xiii APPENDIX D List of Interrupt Vectors 690 INDEX 695 ...
Page 18: ...xiv ...
Page 132: ...104 CHAPTER 5 CLOCKS ...
Page 152: ...124 CHAPTER 6 CLOCK MODULATOR ...
Page 210: ...182 CHAPTER 11 TIME BASE TIMER ...
Page 218: ...190 CHAPTER 12 WATCHDOG TIMER ...
Page 264: ...236 CHAPTER 14 16 BIT RELOAD TIMER WITH EVENT COUNT FUNCTION ...
Page 274: ...246 CHAPTER 15 WATCH TIMER ...
Page 306: ...278 CHAPTER 17 DTP EXTERNAL INTERRUPTS ...
Page 338: ...310 CHAPTER 18 8 10 BIT A D CONVERTER ...
Page 364: ...336 CHAPTER 19 UART0 UART1 ...
Page 398: ...370 CHAPTER 20 UART2 UART3 Figure 20 5 2 ORE Set Timing Receive data RDRF ORE ...
Page 432: ...404 CHAPTER 20 UART2 UART3 ...
Page 482: ...454 CHAPTER 22 SERIAL I O ...
Page 560: ...532 CHAPTER 24 STEPPING MOTOR CONTROLLER ...
Page 582: ...554 CHAPTER 27 ROM MIRRORING MODULE ...
Page 632: ...604 CHAPTER 29 EXAMPLES OF SERIAL PROGRAMMING CONNECTION ...
Page 722: ...694 APPENDIX ...
Page 723: ...695 INDEX The index follows on the next page This is listed in alphabetic order ...
Page 740: ......