Function blocks
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MN05013005E
203
High-speed incremental encoder counters
EZD provides two high-speed incremental encoder counters
CI01 and CI02. The high-speed counter inputs are hardwired
to the digital inputs I1, I2, I3 and I4. These counter relays allow
you to count events independently of the cycle time. You can
enter upper and lower threshold values as comparison values.
The contacts will switch according to the actual value. You
can use a CI.. counter if you wish to define a start value.
The CI.. counters operate independently of the cycle time.
Counter frequency and pulse shape
The maximum counter frequency is 3 kHz.
The signals must be square waves. The mark-to-space ratio
is 1:1. The signals on channels A and B must lead or lag by
90°. Otherwise the counting direction cannot be determined.
Wiring of a counter
The following assignment of the digital inputs apply:
• I1 counter input for the counter CI01 channel A
• I2 counter input for the counter CI01 channel B
• I3 counter input for the counter CI02 channel A
• I4 counter input for the counter CI02 channel B
J
Double the number of pulses are counted as a result of the
internal method of operation of the incremental encoder.
The incremental encoder evaluates the rising and falling
edges. This ensures that the pulse count is not affected by
oscillation of a signal edge. If the number of pulses are
required, divide the value by two.
