Cmsemicon CMS80F731 Series, Reference Manual

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CMS80F731x Reference Manual
18.3.8
SEG Port Enable Control Register LEDSEGEN1
F762H Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
LEDSEGEN1 SEGEN15 SEGEN14 SEGEN13 SEGEN12 SEGEN11 SEGEN10 SEGEN9 SEGEN8
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
Bit7~Bit0 BLESSING<15:8>: LED_S15-LED_S8 port enable control bit;
1= Enable;
0= Disable.
18.3.9
COM0 Corresponding SEG Data Register LEDC0DATAn (n=0-1).
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
LEDC0DATAn
SEG[8n+7] SEG[8n+6] SEG[8n+5] SEG[8n+4] SEG[8n+3] SEG[8n+2] SEG[8n+1] SEG[8n]
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
LEDC0DATA0 Address: F740H; LEDC0DATA1 address: F741H.
Bit7~Bit0 SEG<8n+7:8n>: When com0 port is active, SEG[8n+7]-SEG[8n] port data output;
1= High level;
0= Low level.
18.3.10
COM1 Corresponding SEG Data Register LEDC1DATAn (n=0-1).
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
LEDC1DATAn
SEG[8n+7] SEG[8n+6] SEG[8n+5] SEG[8n+4] SEG[8n+3] SEG[8n+2] SEG[8n+1] SEG[8n]
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
LEDC1DATA0 Address: F744H; LEDC1DATA1 Address: F745H.
Bit7~Bit0 SEG<8n+7:8n>: When com1 port is active, SEG[8n+7]-SEG[8n] port data output;
1= High level;
0= Low level.
18.3.11
COM2 Corresponding SEG Data Register LEDC2DATAn (n=0-1).
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
LEDC2DATAn
SEG[8n+7] SEG[8n+6] SEG[8n+5] SEG[8n+4] SEG[8n+3] SEG[8n+2] SEG[8n+1] SEG[8n]
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
LEDC2DATA0 Address: F748H; LEDC2DATA1 Address: F749H.
Bit7~Bit0 SEG<8n+7:8n>: When com2 port is active, SEG[8n+7]-SEG[8n] port data output;
1= High level;
0= Low level.