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CMS80F731x Reference Manual
10.4.6.2
Capture Mode 1
In capture mode 1, the capture operation event is the execution of a write byte instruction to the capture register. A write
register signal, such as a write RLDL, initiates a capture operation, and the value written is independent of this function. After
the write instruction is executed, the contents of timer 2 are latched into the corresponding capture register.
In capture mode 1, capture events for capture channels 0 to 3 do not produce interrupt request flags.
The block diagram of Capture Mode 1 is shown in the following figure:
TL2
TH2
CCLx / RLDL
(x=1,2,3)
RLDH / CCHx
(x=1,2,3)
Capture
CLK
Write to RLDL / CCLx
(x=1,2,3)
TF2
