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CMS80F731x Reference Manual
10.4.5
Compare Mode
The comparison function consists of two modes: comparison mode 0 and comparison mode 1, selected by the T2CM bit in
the special function register T2CON. These two comparison modes generate periodic signals and change the duty cycle control
mode, and are often used for pulse width modulation (PWM) and control applications where continuous square waves need to
be generated, covering a wide range of applications.
The output channels of the comparison function are CC0, CC1, CC2, CC3. Corresponding to the 16-bit comparison register
{RLDH,RLDL},{CCH1,CCL1},{CCH2,CCL2},{CCH3,CCL3} and the data register {TH2,TL2} output signal.
The 16-bit stored value stored in the comparison register is compared to the count value of the timer, and if the count value
in the data register matches the stored value, a jump in the output signal is generated on the corresponding port pin and an
interrupt flag bit is generated.
10.4.5.1
Compare Mode 0
In mode 0, when the timer's count value and the comparison register are equal, the comparison output signal changes
from low to high. When the timer count value overflows, the comparison output signal goes low. The comparison output
channel is directly controlled by two events: the timer overflow and the comparison operation. The block diagram of
comparision mode 0 is shown in the following figure:
Compare Register
CCxH,CCxL/RLDH,RLDL
(x=1,2,3)
TH2
TL2
Comparator
Timer2
Compare Register
RLDH,RLDL / CCHx,CCLx
(x=1,2,3)
TH2
TL2
16-Bit
16-Bit
Overflow
Compare Singnal
TF2
T2CxIF (x=0,1,2,3)
Comparator
Q
Q
Q
Q
CC0
CC2
CC1
Q
Q
Q
Q
CC3
Set Register
Reset Register
