Cmsemicon CMS80F731 Series, Reference Manual

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CMS80F731x Reference Manual
17.6.4
PWM Down Compare Interrupt Mask Register PWMDIE
F16BH Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
PWMDIE -- -- PWM5DIE PWM4DIE PWM3DIE PWM2DIE PWM1DIE PWM0DIE
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
Bit7~Bit6 -- Reserved, must be 0.
Bit5~Bit0 PWMnDIE: PWM channel n down compared interrupt shield bits (n=0-5);
1= Enable interrupts;
0= Disable Interrupt.
17.6.5
PWM Zero Interrupt Flag Register PWMZIF
F16DH Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
PWMZIF -- -- PWM5ZIF PWM4ZIF PWM3ZIF PWM2ZIF PWM1ZIF PWM0ZIF
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
Bit7~Bit6 -- Reserved, must be 0.
Bit5~Bit0 PWMnZIF: PWM channel n zero interrupt flag bit (n=0-5);
1= generate interrupts (software zeroing);
0= No interrupt was generated.
17.6.6
PWM Down Compare Interrupt Flag Register PWMDIF
F16FH Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
PWMDIF -- -- PWM5DIF PWM4DIF PWM3DIF PWM2DIF PWM1DIF PWM0DIF
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
Bit7~Bit6 -- Reserved, must be 0.
Bit5~Bit0 PWMnDIF: PWM channel n down to compare interrupt flag bits (n=0-5);
1= generate interrupts (software zeroing);
0= No interrupt was generated.