Cmsemicon CMS80F731 Series, Reference Manual

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CMS80F731x Reference Manual
16.
Buzzer Driver (BUZZER)
16.1 Overview
The buzzer drive module consists of an 8-bit counter, a clock driver, and a control register. The buzzer drives a 50% duty-
square wave with a frequency set by registers BUZCON and BUZDIV, and its frequency output covers a wide range.
16.2 Related Registers
16.2.1
BUZZER Control Register BUZCON
0xBF Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
BUZCON BUSEN -- -- -- -- -- BUZCKS1 BUZCKS0
R/W R/W R R R R R R/W R/W
Reset value 0 0 0 0 0 0 0 0
Bit7 BUSEN: BUZZER enable bit;
1= Enable;
0= Disable.
Bit6~Bit2 -- Reserved, must be 0.
Bit1~Bit0 BUZCKS<1:0>: BUZZER divide-by-side ratio select bits;
00= Fsys/8;
01= Fsys/16;
10= Fsys/32;
11= Fsys/64.
16.2.2
BUZZER Frequency Control Register BUZDIV
0xBE Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
BUZDIV BUZDIV7 BUZDIV6 BUZDIV5 BUZDIV4 BUZDIV3 BUZDIV2 BUZDIV1 BUZDIV0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
Bit7~Bit0
BUZDIV<7:0>: BUZZER frequency select bit;
0x00= No square wave output (output low);
Other = Fbuz =Fsys/(2*CLKDIV*BUZCKS).