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CMS80F731x Reference Manual
25.3 Feature Description
During flash memory read/write/erase operations, the CPU is in a paused state, and when the operation is complete, the
CPU continues to run instructions. Flash operation times are as follows:
⚫
Write time approx. 30us (including data detection time before writing, programming time, end processing time)
⚫
Reading time: 10*Tsys
⚫
Sector erase time is approximately: 4.6ms
The operation memory instruction must be followed by 6 NOP instructions, for example:
MOV MCTRL,#09H
; The write operation begins
NOP
NOP
NOP
NOP
NOP
NOP
MOV MCTRL,#01H
; The read operation begins
NOP
NOP
NOP
NOP
NOP
NOP
The program CRC check command is set by the register MCTRL [3:2], the start and end addresses are freely configurable
through the registers MADRL/MADRH, and the results are saved in the register PCRCDL/PCRCDH.
This CRC operation can only access the program storage space, and the data storage space cannot be accessed. During
the program space CRC check, the CPU stops working and waits for the CPU to continue running after the CRC calculation is
complete. The CRC check is checked bytely, from the initial address to the end address, and after performing the current CRC
check, you need to set the MMODE [1:0]=00 of MCTRL. The CRC check procedure is as follows:
1)
Enable access to program memory registers:
TA = 0xAA;
TA = 0x55;
MLOCK=0xAA; The default value is AA
2)
Check the results before clearing the program CRC:
PCRCDL=0x00;PCRCDH=0x00.
3)
Set the program CRC check start and end addresses:
MCTRL[1]=0, set the starting address by MADRL/MADRH;
MCTRL[1]=1, with the end address set via MADRL/MADRH.
4)
Start the program CRC check command:
MCTRL=0x05.
5)
Wait for the program CRC check to end:
After the CRC check is complete, the MCTRL[0] hardware clears 0.