Cmsemicon CMS80F731 Series, Reference Manual

Page: 211 / 239

www
.mcu.com.cn
212
/
239
Rev.
1.00
CMS80F731x Reference Manual
23.4 ADC Results Comparison
The ADC module provides a set of digital comparators for comparing the results of an ADC with the value size of preloaded
{ADCMPH, ADCMPL}. The result of each ADC conversion is compared to the preset value ADCMP, and the result of the
comparison is stored in the ADCPO flag bit, which is automatically updated after the conversion is completed. The ADCMPPS
bit can change the polarity of the output result.
23.5 How the ADC Works
23.5.1
Start the Conversion
To enable the ADC module, you must first place ADEN bit set to 1 of the ADCON1 register, and then start the analog-to-
digital conversion of ADGO bit set to 1 of the ADCON0 register (ADGO cannot be set to 1 if the ADEN is 0).
23.5.2
Complete the Conversion
When the conversion is complete, the ADC module will:
⚫ Zero ADGO bit;
⚫ Place the ADCIF flag at bit set to 1;
⚫ Update the ADRESH:ADRESL register with the new result of the conversion.
23.5.3
Terminate the Conversion
If the conversion must be terminated before it is complete, the analog-to-digital conversion results that have not yet
completed are not updated to the ADRSH:ADRESL register. Therefore, the ADRESH:ADRESL register will maintain the value
obtained by the last conversion.
Note: A device reset forces all registers to enter a reset state. Therefore, the reset shuts down the ADC module and terminates
any pending transitions.
23.5.4
A/D Conversion Steps
The configuration steps for analog-to-digital conversion using an ADC are as follows:
1)
Port configuration:
⚫ Disable pin output drivers (see PxTRIS registers);
⚫ Configure the pins as analog input pins.
2)
Configure the ADC interrupt (optional):
⚫ Clear the ADC interrupt flag bit;
⚫ Enable ADC interrupts;
⚫ Enable peripheral interrupts;
⚫ Enable global interrupts.
3)
To configure the ADC module:
⚫ Select the ADC conversion clock;
⚫ Select the ADC input channel;