Cmsemicon CMS80F731 Series, Reference Manual

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CMS80F731x Reference Manual
10.2.8
Timer2 Compares/Captures Channel 2 Register Low-bit CCL2
0xC4 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
CCL2
CCL27 CCL26 CCL25 CCL24 CCL23 CCL22 CCL21 CCL20
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
Bit7~Bit0 CCL2<7:0>: Timer 2 compares/captures channel 2 registers low.
10.2.9
Timer2 Compares/Captures Channel 2 Register High-bit CCH2
0xC5 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
CCH2
CCH27 CCH26 CCH25 CCH24 CCH23 CCH22 CCH21 CCH20
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
Bit7~Bit0 CCH2<7:0>: Timer 2 compares/captures channel 2 register bits.
10.2.10
Timer2 Compares/Captures Channel 3 Register Low-bit CCL3
0xC6 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
CCL3
CCL37 CCL36 CCL35 CCL34 CCL33 CCL32 CCL31 CCL30
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
Bit7~Bit0 CCL3<7:0>: Timer 2 compares/captures channel 3 registers low.
10.2.11
Timer2 Compares/Captures Channel 3 Register High-bit CCH3
0xC7 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
CCH3
CCH37 CCH36 CCH35 CCH34 CCH33 CCH32 CCH31 CCH30
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
Bit7~Bit0 CCH3<7:0>: Timer 2 compares/captures channel 3 register high bits.