89
CET Electric Technology
Power Demand Alarm Enable
Bit 0 = Mains-I, Bit 1 = Mains-II
Bits 2 - 15 = Reserved
0 = Disabled
1 = Enabled
0
kW Total Demand H Alarm Threshold (%)
kW Total Demand H Alarm Threshold
0 to 100%
0
kW Total Demand H Alarm Time Delay (s)
kW Total Demand H Alarm Time Delay
0 to 9999 (s)
0
kW Total Demand L Alarm Threshold (%)
kW Total Demand L Alarm Threshold
0 to 100%
0
kW Total Demand L Alarm Time Delay (s)
kW Total Demand L Alarm Time Delay
0 to 9999 (s)
0
kvar Total Demand H Alarm Threshold (%)
kvar Total Demand H Alarm Threshold
0 to 100%
0
kvar Total Demand H Alarm Time Delay (s)
kvar Total Demand H Alarm Time Delay
0 to 9999 (s)
0
kvar Total Demand L Alarm Threshold (%)
kvar Total Demand L Alarm Threshold
0 to 100%
0
kvar Total Demand L Alarm Time Delay (s)
kvar Total Demand L Alarm Time Delay
0 to 9999 (s)
0
kVA Total Demand H Alarm Threshold (%)
kVA Total Demand H Alarm Threshold
0 to 100%
0
kVA Total Demand H Alarm Time Delay (s)
kVA Total Demand H Alarm Time Delay
0 to 9999 (s)
0
kVA Total Demand L Alarm Threshold (%)
kVA Total Demand L Alarm Threshold
0 to 100%
0
kVA Total Demand L Alarm Time Delay (s)
kVA Total Demand L Alarm Time Delay
0 to 9999 (s)
0
Table 4-13 Power Alarm Parameters
The following figures illustrate the logic diagrams of the Power Alarm On/OFF, respectively.
Figure 4-17 Power Alarm ON Logic Diagram
Figure 4-18 Power Alarm OFF Logic Diagram
The logic diagram of Power H Alarm is illustrated in Figure 4-19.
Figure 4-19 Power H Alarm Logic Diagram
The logic diagram of Power L Alarm is illustrated in Figure 4-20.
Figure 4-20 Power L Alarm Logic Diagram
The logic diagram of PF H Alarm is illustrated in Figure 4-21.