Embedded Trace Macrocell
ARM DDI 0500D
Copyright © 2013-2014 ARM. All rights reserved.
13-60
ID021414
Non-Confidential
Attributes
See the register summary in
Table 13-3 on page 13-10
.
Figure 13-55
shows the TRCITCTRL bit assignments.
Figure 13-55 TRCITCTRL bit assignments
Table 13-56
shows the TRCITCTRL bit assignments.
The TRCITCTRL can be accessed through the internal memory-mapped interface and the
external debug interface, offset
0xF00
.
13.8.54 Claim Tag Set Register
The TRCCLAIMSET characteristics are:
Purpose
Sets bits in the claim tag and determines the number of claim tag bits
implemented.
Usage constraints
There are no usage constraints.
Configurations
Available in all configurations.
Attributes
See the register summary in
Table 13-3 on page 13-10
.
Figure 13-56
shows the TRCCLAIMSET bit assignments.
Figure 13-56 TRCCLAIMSET bit assignments
31
0
RES
0
IME
1
Table 13-56 TRCITCTRL bit assignments
Bits
Name
Function
[31:1]
-
Reserved,
RES
0.
[0]
IME
Integration mode enable bit. The possible values are:
0
The trace unit is not in integration mode.
1
The trace unit is in integration mode. This mode enables:
•
A debug agent to perform topology detection.
•
SoC test software to perform integration testing.
RES
0
31
4 3
0
SET