MC96FR116C
November, 2018 Rev.1.8
15
1.4.3 OCD Port Operation
Internal nPOR
Configure Read
Internal RESETb
12 ms (± 20%) @ Internal Ring OSC
LVI RESETB
or LVR RESETB
16 ms (± 20%) @ Internal Ring OSC
DSCL
DSDA
Test Mode
Control Reset
TEST_MODE
(OCD Mode)
The OCD port is used for flash program writing and device debugging. The device has a section that
determines whether to use it in that mode of POR. This is done when the internal reset is cleared and
waiting to clear Configure Read and Internal Reset. If the internal reset is cleared and DSCL and
DSDA wait for a period of time from internal pull-up 'high' to 'low', the internal controller for entering
test mode is initialized. Then, when DSCA and DSCA appointed communication, the test mode is
entered.
As described above, OCD port is a port for special purpose. Even if it is used as Normal GPIO in
User Program, it is necessary to limit the state to prevent malfunction during POR. Therefore, it is
recommended to connect Pull-up Resistor to the outside of OCD Port and to fix OCD Port input to
VDD / GND at POR. If it is difficult to apply pull-up on the circuit, install at least 0.1uf bypass capacitor
to prevent Floating state at POR. However, if you install a bypass cap, you can not use on board
writing and OCD Debugger.
Figure 1-3 OCD Mode Sequence
