MC96FR116C
172
November, 2018 Rev.1.8
0
No external reset detected after clear
1
External reset occurred
WDTRF
Watchdog reset event
NOTE
0
No WDT reset detected after clear
1
WDT reset occurred
OCDRF
On-chip debugger reset event
NOTE
0
No OCD reset detected after clear
1
OCD reset occurred
BODRF
Brown-out detector reset event
NOTE
0
No BOD reset detected after clear
1
BOD reset occurred
BODLS[1:0]
Select bod flag level bit[1:0]. BODLS2 is the register of BODSR[6].
BODLS2
BODLS1
BODLS0
1
x
x
BODI0(1.63V) is bod flag.
0
0
0
BODI1(1.8V) is bod flag.
0
0
1
BODI2(2.0V) is bod flag.
0
1
0
BODI3(2.2V) is bod flag.
0
1
1
BODI4(2.4V) is bod flag.
BODEN
Enables or disables BOD. If stop mode is entered, BOD is temporary disabled.
And if stop mode is exited, BOD state is restored with BODEN.
0
Disable BOD
1
Enable BOD
NOTE
To clear each reset flag, write
‘0’ to associated bit position.
Initial value of ocd mode(debug mode) is D9
H
.
BODSR (BOD Status Register)
8F
H
7
6
5
4
3
2
1
0
BODIF
BODLS2
BODIT
BODI0
BODI4
BODI3
BODI2
BODI1
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 00
H
BODIF
BOD interrupt flag. To clear this flag, write ‘0’ to this bit position.
0
BOD interrupt not requested
1
BOD interrupt requested
BODLS[2]
Select bod flag level bit[2]. Please refer the register of BODLS[1:0],
BODR.
0
BODI0 is selected
1
BODI0 is not selected
BODIT
Select bod flag type.
0
Level event
1
Falling edge event
BODI0
VDD level indicator 0. After calibration, this flag turns on around 1.63V
only when BODLS[2] = 1
B
.
0
VDD level is higher than V
BODI0
1
VDD dropped below V
BODI0
BODI4
VDD level indicator 4. After calibration, this flag turns on around 2.4V
only when BODLS[2:0] = 011
B
.
0
VDD level is higher than V
BODI4
1
VDD dropped below V
BODI4
