MC96FR116C
November, 2018 Rev.1.8
141
11.10 I
2
C
11.10.1 Overview
The I
2
C is one of industrial standard serial communication protocols, and which uses 2 bus lines
Serial Data Line (SDA) and Serial Clock Line (SCL) to exchange data. Because both SDA and SCL
lines are open-drain output, each line needs pull-up resistor. The features are as shown below.
-
Compatible with I
2
C bus standard
-
Multi-master operation
-
Up to 400 KHz data transfer speed
-
7 bit address
-
Support two slave addresses
-
Both master and slave operation
-
Bus busy detection
11.10.2 Block Diagram
SDA
F/F
8-bit Shift Register
(SHFTR)
Slave Addr. Register1
(I2CSAR1)
Noise
Canceller
(debounce)
Data Out Register
(I2CDR)
(I2CSCLHR)
(I2CSCLLR)
(I2CDAHR)
SDA
Out Controller
SCL
Out Controller
SCL
Noise
Canceller
(debounce)
I
n
t
e
r
n
a
l
B
u
s
L
i
n
e
SDAIN
SDAOUT
SCLIN
SCLOUT
1
0
1
0
Debounce
enable
Debounce
enable
Slave Addr. Register
(I2CSAR)
Figure 11-43 I
2
C Block Diagram
