69
Monitor status
(Reference read )
2101H
bit0-1
00: Stop LED off, Run LED on.
01: Stop LED blinks, Run LED ON.
10: Stop LED on, Run LED blinks.
11: Stop LED on, Run LED off.
bit 2
1:JOG acts
bit3,bit4
00: REV LED off, FWD LED on.
01: REV LED blinks, FWD LED on.
10: REV LED off, FWD LED blinks.
11::REV LED on, FWD LED off.
bit 5-7
Reserved
bit 8
1: Master frequency input from communication interface
bit 9
1 Master frequency input from analog signal
bit 10
1: Running reference input from communication interface
bit 11
1 Parameter locking
bit 12
0: machine stop
1: during running
bit 13
1 JOG reference appears
bit14,15 Reserved
2102H
Frequency set (two decimals)
2103H
Output frequency (H)(two decimals)
2104H
Output current (A)(two decimals)
2105H
DC-Bus voltage(U) (one decimal)
2106H
Output voltage(E) (one decimal)
2107H
Current Step speed for multi-step speed reference (step)
2108H
PLC rotating speed (step)
2109H
PLC rotating time(sec)
210AH
External TRIGGER count(count)
2113H
Main frequency command (o)
2114H
Auxiliary frequency command (b)
Abnormal response:
Except for communication signals, the AC motor drive shall feedback a normal signal after receiving
command from master device. Circumstances of abnormal feedback to master device are described
below:
AC motor receives no signal due to communication fault. Thus AC motor has no response. This
shall be treated as timeout status finally by master device.
In case of AC motor receives signals correctly, but treating this signal is unavailable, an abnormal
signal shall be sent back to master device, and digital operator shall display fault signal “CE xx”.
“Xx” is an abnormal signal in decimal. In abnormal response, highest byte of original command code
shall be set to 1, and abnormal code which explains the abnormal information shall be feedback.
Example below shows abnormal response for communication command 06H and abnormal code 02H, in
which the highest byte of 06H is set to 1 thus, it becomes into 86H:
