66
CHK (check sum)
ASC
Ⅱ
M o d e:
LRC(Longitudinal Redundancy check) is adopted by ASC
Ⅱ
M ode.
It is calculated as follows: get sum of data from ADR1 to the last one, unit of SUM shall be 256 in unit,
and remove the extra bite(For example, for 128H of hexadecimal results, only 28H shall be accepted. ),
then perform quadratic counter bonification.
For example, obtain one character from 0401H address of AC motor drive to 01H address.
01H+03H+04H+01H+00H+01H=0AH, Quadratic counter bonification of 0AH shall be F6
Procedure 6: Procedure 2 to 5 shall be repeated to next byte of the command, until treatment to all bytes
have been completed, and final data of CRC shall be value of CRC. Sequence of low byte
and high byte shall be switched, which means that low byte shall be sent in priority.
H)
RTU Mode
:
CRC (Cyclical Redundancy Check) is adopted by RTU Mode, and CRC shall be calculated in following
procedures:
Procedure 1: Fit an FFFFH 16-bit Cache memory (Named as CRC Cache memory)
Procedure 2: Perform “Exclusive OR” calculation on the first byte of Command and sequential byte of
16-bit Cache memory. And results shall be memorized in CRC Cache memory.
Procedure 3: Move 1 bit rightwards for content of CRC cache memory, and the first left bit shall be
completed with 0. Check for value of the lowest bit of CRC cache memory.
Procedure 4: Repeat Procedure 3 if the lowest bit is 0; otherwise, perform “Exclusive OR” calculation on
CRC cache memory and A001H.
Procedure 5: Procedure 3 and Procedure 4 shall be repeated until content of CRC cache memory has
been moved rightwards for 8 bits. At this time, this byte has completed treatment.
Data address
Data
