7-24
Section 7: Model 9100: Specifications
Final Width = 215mm
7.17 Logic-Levels Function Specifications
7.17.1 Logic-Levels Accuracy
The accuracy of each DC signal voltage is the same as that of the equivalent voltage
in DC Voltage Function (Sub-section 7.3).
Logic
Signal
Screen
Default
Boundaries
Adjustment
Type
Level
Indication
Value
Limits
('H' or 'L')
TTL
High
HIGH LVL
+5.00V
V +2.00V
+5.50V
Intermediate
— — — — —
---
+0.8V
<
V
<
+2.00V
---
Low
LOW LVL
0.00V
V 0.8V
0.00V
CMOS
High
HIGH LVL
+5.00V
V +3.50V
+6.00V
Intermediate
— — — — —
---
+1.5V
<
V
<
+3.50V
---
Low
LOW LVL
0.00V
V 1.5V
0.00V
ECL
High
HIGH LVL
-0.9V
V -1.11V
0.00V
Intermediate
— — — — —
---
-1.48V
<
V
<
-1.11V
---
Low
LOW LVL
-1.75V
V -1.48V
-5.20V
7.17.2 Logic-Levels DC Signal Voltage Boundaries
Содержание 9100 Series
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