A96G140/A96G148/A96A148 User’s manual
Appendix
275
Table 59. Instruction Table (continued)
MISCELLANEOUS
Mnemonic
Description
Bytes
Cycles Hex code
NOP
No operation
1
1
00
ADDITIONAL INSTRUCTIONS (selected through EO[7:4])
Mnemonic
Description
Bytes
Cycles Hex code
MOVC
@(DPTR++),A
M8051W/M8051EW-specific
instruction
supporting
software download into program memory
1
2
A5
TRAP
Software break command
1
1
A5
In the above table, entries such as E8-EF indicate continuous blocks of hex opcodes used for 8 different
registers. Register numbers of which are defined by the lowest three bits of the corresponding code. Non-
continuous blocks of codes, shown as
‘
11
→
F1
’
(for example), are used for absolute jumps and calls, with the
top 3 bits of the code being used to store the top three bits of the destination address.
CJNE instructions use abbreviation of #d for immediate data; other instructions use #data as an abbreviation.