NO:
W90P710 Programming Guide
VERSION:
2.0
PAGE:
229
The above information is the exclusive intellectual property of Winbond Electronics and shall not be disclosed, distributed or reproduced without permission
from Winbond.
Table No.: 2005-W90P710-11-A
Most set two break codes are two bytes long where the first byte is F0h and the second byte is the
make code for that key. Break codes for extended keys are usually three bytes long where the first
two bytes are E0h, F0h, and the last byte is the last byte of that key's make code. Figure 21.3 shows
the set two make codes and break codes for a few keys.
Figure 21-3 Make Code and Break Code
Key
(Set 2)
Make Code
(Set 2)
Break Code
“A” 1C
F0,
1C
“5” 2E
F0,
2E
“F10” 09 F0,
90
Right Arrow
E0, 74
E0, F0, 74
Right “Ctrl”
E0, 14
E0, F0, 14
21.3 Register Map
The PS/2 interface host controller provides four control registers. The regisger PS2CMD is used
to send command to a PS/2 device. The register PS2STS indicates the status of transmit and receive
of PS/2 interface. The registers PS2SCANCODE and PS2ASCII are used to store the scan code and
ASCII code of the key arrived.
Register
Address
R/W
Description
Reset Value
PS2CMD
0xFFF8.9000
R/W
PS2 Host Controller Command Register
0x0000.0000
PS2STS
0xFFF8.9004
R/W
PS2 Host Controller Status Register
0x0000.0000
PS2SCANCODE 0xFFF8.9008
RO
PS2 Host Controller RX Scan Code Register
0x0000.0000
PS2ASCII
0xFFF8.900C RO
PS2 Host Controller RX ASCII Code Register 0x0000.0000
21.4 Functional Description
21.4.1 Initialization
The PS/2 clock and data are shared pins. The register GPIO_CFG5 must be set for selecting
PS/2 interface. After that, the software driver can send a reset command to reset a PS/2 device.
1. Configure GPIO_CFG5 (0xFFF83050) : set bits 11 ~ 8 to 0xF
