NO:
W90P710 Programming Guide
VERSION:
2.1
PAGE:
5
The above information is the exclusive intellectual property of Winbond Electronics and shall not be disclosed,
distributed or reproduced without permission from Winbond.
Table No.: 1200-0003-07-A
5.4.1
GDMA Configuration ..................................................................................................... 60
5.4.2
Transfer Count............................................................................................................... 62
5.4.3
Transfer Termination ..................................................................................................... 63
5.4.4
GDMA operation started by software............................................................................. 63
5.4.5
GDMA operation started by nXDREQ ........................................................................... 65
5.4.6
Fixed Address................................................................................................................ 66
5.4.7
Block Mode Transfer ..................................................................................................... 66
5.4.8
Single Mode Transfer .................................................................................................... 66
5.4.9
Demand Mode Transfer................................................................................................. 66
6
USB Host Controller..................................................................................................................... 68
6.1
Overview............................................................................................................................... 68
6.2
Registers Map....................................................................................................................... 69
6.3
Block Diagram ...................................................................................................................... 70
6.4
Data Structures..................................................................................................................... 71
6.4.1
Endpoint Descriptor (ED) Lists ...................................................................................... 72
6.4.2
Transfer Descriptor........................................................................................................ 73
6.4.3
Host Controller Communication Area ............................................................................ 75
6.5
Programming Note................................................................................................................ 76
6.5.1
Initialization.................................................................................................................... 76
6.5.2
USB States .................................................................................................................... 77
6.5.3
Add/Remove Endpoint Descriptors................................................................................ 78
6.5.4
Add/Remove Transfer Descriptors ................................................................................ 80
6.5.5
IRP Processing.............................................................................................................. 82
6.5.6
Interrupt Processing ...................................................................................................... 84
6.5.7
Done Queue Processing................................................................................................ 88
6.5.8
Root Hub ....................................................................................................................... 90
7
USB Device Controller ................................................................................................................. 94
7.1
Overview............................................................................................................................... 94
7.2
Block Diagram ...................................................................................................................... 95
7.3
Register Map ........................................................................................................................ 95
7.4
Functional descriptions ......................................................................................................... 97
7.4.1
Initialization.................................................................................................................... 97
7.4.2
Endpoint Configuration .................................................................................................. 98