NO:
W90P710 Programming Guide
VERSION:
2.1
PAGE:
98
The above information is the exclusive intellectual property of Winbond Electronics and shall not be disclosed,
distributed or reproduced without permission from Winbond.
Table No.: 1200-0003-07-A
host will detect a device attached.
7.4.2 Endpoint Configuration
Configure the endpoint of USBD controller contains the following steps:
1. Configure
registers
EPx_INFO
according to the application.
Using mass storage device as an example, programmer could configure endpoint A to bulk
out endpoint 1, belongs to configuration 1 and interface 0, with maximum packet size 64
bytes by writing 0x20400011 to register
EPA_INFO
, and configure endpoint B to bulk in
endpoint 2, belongs to configuration 1 and interface 0, with maximum packet size 64 bytes by
writing 0x20400012 to register
EPB_INFO
.
Note: This configuration must be consistent with configuration, interface and endpoint
descriptors
2. Enable endpoint interrupts by configure register
EPx_IE
according to application. Such as
EPx_DMA_IE
bit to enable the endpoint DMA interrupt.
3. If the endpoint was configuring to be Isochronous IN, the programmer could set the
EPx_THRE
bit of
EPx_CTL
register to control the available space in FIFO when DMA
accesses memory.
4. Set
the
EPx_RST
bit of
EPx_CTL
register to reset the endpoint.
5. Set
the
EPx_EN
bit of
EPx_CTL
register to active the endpoint.
6. If USB host select an alternative setting for a specified interface, configure register
EPx_INFO
accordingly.
7.4.3 Interrupt Service Routine
The interrupt service routine should check 4 registers
USB_IS
and
EPx_IS,
if any interrupt in
USB_IE
or
EPx_IE
register is enabled. After service an interrupt, ISR has to set the relative bit of that
interrupt in register
USB_IC
or
EPx_IC
to clear the interrupt status.
