NO:
W90P710 Programming Guide
VERSION:
2.1
PAGE:
75
The above information is the exclusive intellectual property of Winbond Electronics and shall not be disclosed,
distributed or reproduced without permission from Winbond.
Table No.: 1200-0003-07-A
to
TD
list of the corresponding
ED
of the pipe specified in the original
IRP
. The
TD
list of an
ED
is
maintained by the
HeadP
and
TailP
fields of the
ED
itself.
6.4.3 Host Controller Communication Area
The
Host Controller Communications Area (HCCA)
is a 256-byte structure of system memory,
which is used by
HCD
to communicate with HC.
HCCA
must be aligned to 256 bytes address
boundary. This memory block must be set to non-cacheable memory region, because HC accesses
this memory block by DMA transfer.
HCD
must claim the physical address of
HCCA
by writing the
physical address to
HcHCCA
register to notify HC the address of
HCCA
.
Table 6-1 HCCA (Host Controller Communication Area)
Offset
Size
(bytes)
Name
Description
0
128
HccaInterrruptTable
These 32 Dwords are pointers to interrupt EDs.
0x80
2
HccaFrameNumber
Contains the current frame number. This value
is updated by the HC before it begins
processing the periodic lists for the frame.
0x82
2
HccaPad1
When the HC updates
HccaFrameNumber
, it
sets this word to 0.
0x84
4
HccaDoneHead
When the HC reaches the end of a frame and
its deferred interrupt register is 0, it writes the
current value of its
HcDoneHead
to this
location and generates an interrupt if interrupts
are enabled. This location is not written by the
HC again until software clears the WD bit in
the
HcInterruptStatus
register.
The LSb of this entry is set to 1 to indicate
whether an unmasked
HcInterruptStatus
was
set when
HccaDoneHead
was written.
0x88
116
reserved
Reserved for use by HC
The
Host Controller Communication Area
format of W90P710 USB
Host Controller
is compliant
to OpenHCI Specification 1.0a. Detail descriptions about each field in
HCCA
can be found in this
document.
