NO:
W90P710 Programming Guide
VERSION:
2.0
PAGE:
206
The above information is the exclusive intellectual property of Winbond Electronics and shall not be disclosed, distributed or reproduced without permission
from Winbond.
Table No.: 2005-W90P710-11-A
I2C sequence:
1. Generate start signal
2. Write slave a write bit, then receive acknowledge from slave
3. Write memory location, then receive acknowledge from slave
4. Generate repeated start signal
5. Write slave a read bit, then receive acknowledge from slave
6. Read byte from slave
7. Write not acknowledge (NACK) to slave, indicating end of transfer
8. Generate stop signal
'0' (write)
S
Slave Address
(7'b 1001110)
R/W
Data
A
P
Data address
(0x20)
A
A
'1' (read)
S
Slave Address
(7'b 1001110)
R/W
A
f rom master to slav e
f rom slav e to master
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
S = START condition
P = STOP condition
Commands:
1. Write a value into
DIVIDER
register to determine the frequency of serial clock.
2. Set
Tx_NUM
= 0x01 and set
I2C_EN
= 1 of
CSR
register to enable I2C core.
3. Write 0x9C (slave a write bit 0) to
TxR[15:8]
, set 0x20 to
TxR[7:0]
.
4. Set
START
bit, and
WRITE
bit of
CMDR
register.
5. Wait for interrupt or
I2C_TIP
flag to negate
6. Read
I2C_RxACK
bit from
CSR
register, it should be '0'. If it is not ‘0’, there are some errors
happened.
7. Write 0x9D (slave a read bit 1) to
TxR[7:0]
.
8. Set
START
bit, and
WRITE
bit of
CMDR
register.
9. Wait for interrupt or
I2C_TIP
flag to negate
10. Read
I2C_RxACK
bit from
CSR
register, it should be '0'. If it is not ‘0’, there are some errors
happened.
11. Set
READ
bit, set
ACK
to '1' (NACK), and set
STOP
bit of
CMDR
register.
