NO:
W90P710 Programming Guide
VERSION:
2.0
PAGE:
132
The above information is the exclusive intellectual property of Winbond Electronics and shall not be disclosed, distributed or reproduced without permission
from Winbond.
Table No.: 2005-W90P710-11-A
The input frame data format is shown as following:
Table 10-4 AC97 Input Frame Data Format
Tag
(slot 0)
Bit 15
: frame validity bit, 1 is valid, 0 is invalid.
Bits 14-3
: slot validity, but in W99702, only bits 6-3 are used, bits 14-7 are unused. Bit 3 is
corresponding to slot 1; bit 4 is corresponding to slot 2, etc. 1 is valid, 0 is invalid. The
unused bits 14-7 should be cleared to 0.
Bits 2-0
should be cleared to 0.
Status
ADDR
(Slot 1)
Bit 19
should be cleared to 0
Bit 18-12
: control register address which previous frame requested
Bit 11
: PCM data for left channel request, it should be always 0 when VRA=0 (VRA:
Variable Rate Audio mode)
Bit 10
: PCM data for right channel request
Bit 9-0
should be cleared to 0
Status
DATA
(Slot 2)
Bit 19-4
: Control register read data which previous frame requested. It should be cleared
to 0 if this slot is invalid)
Bit 3-0
should be cleared to 0
PCM
LEFT
(Slot 3)
Bit 19-4
: PCM record data for left channel
Bit 3-0
should be cleared to 0
PCM
RIGHT
(Slot 4)
Bit 19-4
: PCM record data for right channel
Bit 3-0
: should be cleared to 0
10.4.1
Cold Reset External AC97 Codec
To reset external AC97 codec, please follow the steps below:
1.
Set the
AC_C_RES
bit of
ACTL_ACCON
register for 10ms, and then clear it.
2.
Check the
CODEC_READY
bit of
ACTL_ACIS0
register. If
CODEC_READY
was set,
the reset operation successes.
10.4.2
Read AC97 Registers
To read registers of external AC97 codec, please follow the steps below:
1.
Set
R_WB
bit of
ACTL_ACOS1
register, and write the register index of AC97 codec
register to be read to
R_INDEX[6:0]
of
ACTL_ACOS1
register.
2.
Set
VALID_FRAME
and
SLOT_VALID[0]
bits of
ACTL_ACOS0
register. The register
index will be delivered by slot1
