NO:
W90P710 Programming Guide
VERSION:
2.0
PAGE:
146
The above information is the exclusive intellectual property of Winbond Electronics and shall not be disclosed, distributed or reproduced without permission
from Winbond.
Table No.: 2005-W90P710-11-A
Start
Set Baud Rate
Set parity bit , Data bits, and
Stop bit
Set Rx FIFO Trigger Level
Reset Tx, Rx FIFO
Set Time-Out Register
Enable Tx, Rx, RLS interrupt
End
1. Set 1 bit DLAB bit of
LCR
Register
2. Write divisor value to
DLL
,
DLM
LCR
Registers
7
DLAB : Divider Latch Access Bit
6
BCB : Break Control Bit
5
SPE : Stick Parity Bit
4
EPE : Even Parity Enable
3
PBE : Parity Bit Enable
2
NSB : Number of "STOP" bit
0 One "STOP" bit
1 1.5 "STOP" bit
1:0
WLS : Word Length Select
00 5 bits
01 6 bits
10 7 bits
11 8 bits
FCR
Register
7:6
RFITL : Rx FIFO Interupt Trigger Level
00 1 Byte
01 4 Byte
10 8 Byte
11 14 Byte
2
TFR : Tx FIFO Reset
1
RFR : Rx FIFO Reset
IER
Register
3
MSIE : Modem Status Interrupt Enable
2
RLSIE : Receive Line Status Interrupt Enable
1
THREIE : Transmit Holding Register Empty
Interrupt Enable
0
RADIE : Receive Data Available Interrupt Enable
and Time-out Interrupt Enable.
TOR
7
TOIE : Timeout Interrupt Enabled, IER Bit 0
RADIE should be enabled also.
6:0
Counter for Timeout (unit by baudrate)
