NO:
W90P710 Programming Guide
VERSION:
2.1
PAGE:
30
The above information is the exclusive intellectual property of Winbond Electronics and shall not be disclosed,
distributed or reproduced without permission from Winbond.
Table No.: 1200-0003-07-A
The configurations of SDCONF and SDTIME are dependent on the SDRAM types attached to the
EBI interface. Thus the software should have the information about the SDRAM attached to the EBI
interface before set the SDCONF and SDTIME according to the timing of SDRAM types. The SDRAM
components supported by W90P710 can be found in W90P710 spec data sheet.
The base address of SDRAM bank 0 and bank 1 are also programmable. By BASADDR of
SDCONF, the SDRAM bank can be place in a specific address location. BASADDR is 13 bits, and the
base address is calculated as BASADDR << 18. Thus the range of the base address each SDRAM
bank is from 0x0 to (2^13-1)*2^18. Whenever setting the SDCONF register, the MRSET bit should be
set. If this bit doesn’t set when setting SDCONF, the SDRAM controller won’t issue a mode register set
command to SDRAM and the setting will be invalid. The SDRAM controller offers auto pre-charge mode
of SDRAM for SDRAM bank0/1. If this mode is enabled, the SDRAM will issue a pre-charge command
to SDRAM when for each access.
2.4.4 External I/O control registers
The W90P710 supports an external device control without glue logic. It is very cost effective
because provides address decoding and control signals timing logic are not needed. The control
registers can control special external I/O devices for providing the low cost external devices control
solution. For instance, if there is a SRAM is attached to the external I/O bank 0. Then the SRAM can be
access as memory after setting the external I/O control register of external I/O bank 0. By the way, the
flash ROM also can be attached to the external I/O. There are four external I/O banks relative to four
control registers called EXT0CON, EXT1CON, EXT2CON, and EXT3CON. The base address of each
external I/O bank can be set by BASADDR of external I/O control register. BASADDR is 13 bits and the
base address is calculated as BASADDR << 18.
2.4.5 A system memory initialization example flow chart
Figure 2-2 System Memory Map Setting Flow
