NO:
W90P710 Programming Guide
VERSION:
2.0
PAGE:
209
The above information is the exclusive intellectual property of Winbond Electronics and shall not be disclosed, distributed or reproduced without permission
from Winbond.
Table No.: 2005-W90P710-11-A
18 Universal Serial Interface
18.1 Overview
The Universal Serial Interface (USI) is a synchronous serial Interface performs a serial-to-parallel
conversion on data characters received from the peripheral, and a parallel-to-serial conversion on
data characters received from CPU. This interface can drive up to 2 external peripherals and is seen
as the master. It can generate an interrupt signal when data transfer is finished and can be cleared by
writing 1 to the interrupt flag. The active level of device/slave select signal can be chosen to low active
or high active, which depends on the peripheral it’s connected. Writing a divisor into DIVIDER register
can program the frequency of serial clock output. This master core contains four 32-bit
transmit/receive buffers, and can provide burst mode operation. The maximum bits can be
transmitted/received is 32 bits, and can transmit/receive data up to four times successive.
The USI (MICROWIRE/SPI) Master Core includes the following features:
AMBA
APB
interface
compatible
Support USI (MICROWIRE/SPI) master mode
Full duplex synchronous serial data transfer
Variable length of transfer word up to 32 bits
Provide burst mode operation, transmit/receive can be executed up to four times in one
transfer
MSB or LSB first data transfer
Rx and Tx on both rising or falling edge of serial clock independently
2
slave/device
select
lines
Fully static synchronous design with one clock domain
